Modeling and simulation of semiconductor devices using machine learning머신 러닝을 이용한 반도체 소자 모델링 및 시뮬레이션

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dc.contributor.advisor신민철-
dc.contributor.authorKim, Bokyeom-
dc.contributor.author김보겸-
dc.date.accessioned2024-08-08T19:31:38Z-
dc.date.available2024-08-08T19:31:38Z-
dc.date.issued2024-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1100072&flag=dissertationen_US
dc.identifier.urihttp://hdl.handle.net/10203/322166-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2024.2,[xviii, 130 p. :]-
dc.description.abstractThis paper delves into the modeling and simulation of semiconductor devices through the utilization of machine learning. We propose an approach leveraging machine learning to model device performance and physical characteristics based on semiconductor device parameters, subsequently employing these models for optimization and simulation. To elaborate further, we employ Bayesian optimization methods to maximize the performance of a state-of-the-art 3-nanometer node nanosheet field-effect transistor within a five-dimensional design space. Furthermore, through the application of physics-informed machine learning, we efficiently model and simulate the spatial physical attributes of nanowires, which represent the next-generation gate-all-around device. This study introduces and proposes a novel methodology for effectively addressing the challenges of modeling increasingly complex semiconductor devices by harnessing the latest advancements in machine learning techniques.-
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectSemiconductor devices▼aNanowire▼aMachine learning▼aBayesian optimization▼aPhysics-informed machine learning-
dc.subject반도체 소자▼a나노와이어▼a머신러닝▼a베이지안 최적화▼a물리정보 머신러닝-
dc.titleModeling and simulation of semiconductor devices using machine learning-
dc.title.alternative머신 러닝을 이용한 반도체 소자 모델링 및 시뮬레이션-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN325007-
dc.description.department한국과학기술원 :전기및전자공학부,-
dc.contributor.alternativeauthorShin, Mincheol-
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