DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 이현주 | - |
dc.contributor.author | Bang, Sang-ho | - |
dc.contributor.author | 방상호 | - |
dc.date.accessioned | 2024-07-30T19:31:31Z | - |
dc.date.available | 2024-07-30T19:31:31Z | - |
dc.date.issued | 2024 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1097182&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/321610 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2024.2,[iii, 34 p. :] | - |
dc.description.abstract | Ultrasonic imaging that can observe the internal structure using reflected waves of ultrasonic waves is used in the medical field. In particular, a portable ultrasonic imaging system is being studied. The capacitive micromachined ultrasonic transducer (CMUT) device has the advantage of having a broad bandwidth. However, there is a disadvantage of requiring a high bias voltage when driving the CMUT device. In this thesis, a design to lower the operating voltage of the CMUT device was conceived, and the performance was verified through the simulation. For low voltage driving, a device has been proposed to replace the insulation layer material inside the cavity structure with material having high dielectric constant. In addition, the area of ultrasonic waves generated was maximized by using the wafer bonding process, and the size of the insulation layer inside the cavity was maximized by establishing a self-aligned process. The device fabricated by the developed process always exhibited a lower operating voltage than the silicon dioxide insulation layer. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | 정전용량형 미세가공 초음파 트랜스듀서 (CMUT)▼aMEMS▼a저전압▼a초음파 이미징▼a자기 정렬▼a고유전율 유전체 | - |
dc.subject | Capacitive Micromachined Ultrasonic Transducer (CMUT)▼aMEMS▼aUltrasonic imaging▼aSelf-aligned▼aHigh-k dielectric | - |
dc.title | Design of self-aligned high-k insulation layer to lower the operating voltage of CMUT devices | - |
dc.title.alternative | 정전용량형 미세가공 초음파 소자의 저전압 구동을 위한 자기 정렬 고유전율 절연층 구조 설계 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전기및전자공학부, | - |
dc.contributor.alternativeauthor | Lee, Hyunjoo Jenny | - |
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