(A) low-power and real-time 3-D object recognition system-on-chip저전력 실시간 3차원 물체 인식 시스템 온 칩

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This paper introduces the study of system-on-chip (SoC) designs including hardware-friendly algorithm design, hardware architecture design, ASIC design, and system board design for low-power and low-latency 3-D object recognition SoC in mobile platforms. A 3-D object recognition system consists of 3-D RGB-D data generation and 3-D perception, and the efficient SoC is proposed to accelerate all of them. Specifically, the proposed SoC adopts deep learning-based monocular depth estimation and sensor fusion algorithms with a low-power depth sensor to generate accurate and robust 3-D RGB-D data, which overcomes the disadvantages of previous 3-D RGB-D generation systems that highly rely on high-performance depth sensors. Then, a 3-D point cloud-based neural network is executed on 3-D RGB-D data for accurate 3-D perception. Therefore, this system achieves an accurate and robust 3-D object recognition system with a minimum sensor power consumption. Key features for accelerating this system in mobile platforms are as follows. The window-based search algorithm and its acceleration hardware unit are proposed to efficiently accelerate point processing algorithms. Moreover, band matrix encoding and decoding algorithms are developed to reduce data transactions, and their acceleration hardware units are designed to improve the speed of sensor fusion executions. In addition, zero input and output data acceleration methods through a sparse bit-slice architecture are proposed to maximize the processing speed of matrix multiplication. In addition, the point feature reuse algorithm is proposed to solve redundant operations caused by 3-D point cloud-based neural networks, and its hardware architecture is designed to increase throughput. With these key features, the system-on-chip is fabricated in a silicon chip, and the demonstration system board is designed to evaluate the silicon chip, finally showing the real-time implementation of the 3-D object recognition system. Consequently, the proposed system-on-chip achieves 281.6 mW power consumption and 31.3 ms processing time of the 3-D object recognition system.
Advisors
유회준researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2023
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2023.8,[viii, 105 p. :]

Keywords

인공지능 가속기▼a컨볼루션 연산▼aRGB-D 데이터▼a3차원 물체 인식▼a센서 퓨전▼a단안깊이추정▼a비트슬라이스 아키텍처▼a시스템온칩; Deep learning accelerator▼aconvolution operation▼aRGB-D data▼a3-D object recognition system▼asensor fusion▼amonocular depth estimation▼abit-slice architecture▼asystem-on-chip

URI
http://hdl.handle.net/10203/320951
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1047247&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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