DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Jeong-Hyun | ko |
dc.contributor.author | Bae, Hong-Hyun | ko |
dc.contributor.author | Lim, Gyu-Wan | ko |
dc.contributor.author | Kong, Tae-Hwang | ko |
dc.contributor.author | Yang, Jun-Hyeok | ko |
dc.contributor.author | Kim, Hyun-Sik | ko |
dc.date.accessioned | 2024-07-26T04:00:06Z | - |
dc.date.available | 2024-07-26T04:00:06Z | - |
dc.date.created | 2024-07-26 | - |
dc.date.created | 2024-07-26 | - |
dc.date.created | 2024-07-26 | - |
dc.date.created | 2024-07-26 | - |
dc.date.created | 2024-07-26 | - |
dc.date.issued | 2024-08 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.8, pp.2529 - 2544 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/320755 | - |
dc.description.abstract | This article presents a fully integrated voltage regulator (FIVR) featuring a high power density, fast dynamic voltage scaling (DVS), and self-balanced inductor currents. The proposed two-phase 2L1C buck converter topology can 2 $\times$ reduce the number of power switches and flying capacitors (CF) compared to the conventional two-phase three-level (2P3L) converters while inheriting the benefit of a lower switching voltage. The single-CF-based self-balancing of the inductor currents with no extra overhead is a key contribution to this work. For the high scalability of the 2L1C topology, the inter-channel balancing (ICB) scheme is also presented. Moreover, the proposed charge-recycling gate driver is capable of reducing the switching power loss. The proposed two-phase FIVR chip with on-chip spiral inductors of 2 nH was fabricated in a 55-nm CMOS process. The chip operating at 200 MHz/phase showed a 45-V/ mu s DVS rate and a transient slew rate of 40 mA/ns. The measured power density and the peak efficiency were 0.9 W/mm(2) and 79.1%, respectively. The ICB scheme was demonstrated with the four-phase VR chip able to supply a maximum output power of 2 W. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Fully Integrated Multi-Phase Voltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling Gate Driver | - |
dc.type | Article | - |
dc.identifier.wosid | 001164161700001 | - |
dc.identifier.scopusid | 2-s2.0-85187290428 | - |
dc.type.rims | ART | - |
dc.citation.volume | 59 | - |
dc.citation.issue | 8 | - |
dc.citation.beginningpage | 2529 | - |
dc.citation.endingpage | 2544 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.identifier.doi | 10.1109/jssc.2024.3360708 | - |
dc.contributor.localauthor | Kim, Hyun-Sik | - |
dc.contributor.nonIdAuthor | Kong, Tae-Hwang | - |
dc.contributor.nonIdAuthor | Yang, Jun-Hyeok | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | DC-DC buck converter | - |
dc.subject.keywordAuthor | dynamic voltage scaling (DVS) | - |
dc.subject.keywordAuthor | flying capacitor | - |
dc.subject.keywordAuthor | integrated voltage regulator (IVR) | - |
dc.subject.keywordAuthor | inter-inductor current balancing | - |
dc.subject.keywordAuthor | multi-phase | - |
dc.subject.keywordAuthor | on-chip spiral inductor | - |
dc.subject.keywordAuthor | power density | - |
dc.subject.keywordPlus | BUCK CONVERTER | - |
dc.subject.keywordPlus | CURRENT-DENSITY | - |
dc.subject.keywordPlus | EFFICIENCY | - |
dc.subject.keywordPlus | TIME | - |
dc.subject.keywordPlus | CALIBRATION | - |
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