Area-selective deposition of germanium on patterned graphene/monolayer molybdenum disulfide stacks via dipole engineering

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dc.contributor.authorLee, Yeonjooko
dc.contributor.authorAhmed, Towfiqko
dc.contributor.authorWang, Xuejingko
dc.contributor.authorPettes, Michael T.ko
dc.contributor.authorKim, Yeonhooko
dc.contributor.authorPark, Jeongwonko
dc.contributor.authorYang, Woo Seokko
dc.contributor.authorKang, Kibumko
dc.contributor.authorHong, Young Joonko
dc.contributor.authorKwon, Soyeongko
dc.contributor.authorYoo, Jinkyoungko
dc.date.accessioned2024-07-02T11:00:08Z-
dc.date.available2024-07-02T11:00:08Z-
dc.date.created2024-06-19-
dc.date.issued2024-03-
dc.identifier.citationAPL MATERIALS, v.12, no.3-
dc.identifier.issn2166-532X-
dc.identifier.urihttp://hdl.handle.net/10203/320119-
dc.description.abstractHeterogeneous integration of two-dimensional materials and the conventional semiconductor has opened opportunities for next-generation semiconductor devices and their processing. Heterogeneous integration has been studied for economical manufacturing by substrate recycling and novel functionalities by a combination of incommensurate materials. However, utilizing the integration requires controlling locations of the integrated architectures. Here, we show area-selective deposition (ASD) of germanium on the graphene/MoS2 stack. Ge nucleation precisely occurred on the surfaces of the patterned graphene/MoS2 stack via dipole engineering. In this study, the growth temperature of ASD of Ge was significantly lower than that based on precursor desorption on SiO2. The first-principles calculations revealed that Ge deposited by ASD on the graphene/MoS2 stack was not affected by charge transfer. This work provides a viable way to utilize atomically thin materials for next-generation semiconductor devices, which can be applicable for "Beyond Moore" and "More Moore" approaches.-
dc.languageEnglish-
dc.publisherAIP Publishing-
dc.titleArea-selective deposition of germanium on patterned graphene/monolayer molybdenum disulfide stacks via dipole engineering-
dc.typeArticle-
dc.identifier.wosid001180028900005-
dc.identifier.scopusid2-s2.0-85186766271-
dc.type.rimsART-
dc.citation.volume12-
dc.citation.issue3-
dc.citation.publicationnameAPL MATERIALS-
dc.identifier.doi10.1063/5.0187351-
dc.contributor.localauthorKang, Kibum-
dc.contributor.nonIdAuthorLee, Yeonjoo-
dc.contributor.nonIdAuthorAhmed, Towfiq-
dc.contributor.nonIdAuthorWang, Xuejing-
dc.contributor.nonIdAuthorPettes, Michael T.-
dc.contributor.nonIdAuthorKim, Yeonhoo-
dc.contributor.nonIdAuthorYang, Woo Seok-
dc.contributor.nonIdAuthorHong, Young Joon-
dc.contributor.nonIdAuthorKwon, Soyeong-
dc.contributor.nonIdAuthorYoo, Jinkyoung-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordPlusCHEMICAL-VAPOR-DEPOSITION-
dc.subject.keywordPlusALTERNATING CYCLIC METHOD-
dc.subject.keywordPlusTHIN-FILM ALLOYS-
dc.subject.keywordPlusGRAPHENE-
dc.subject.keywordPlusEPITAXY-
dc.subject.keywordPlusSILICON-
dc.subject.keywordPlusGROWTH-
dc.subject.keywordPlusINTEGRATION-
dc.subject.keywordPlusMOS2-
dc.subject.keywordPlusGATE-
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MS-Journal Papers(저널논문)
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