Signal Integrity Analysis of Through-Silicon-Via (TSV) with Passive Equalizer to Separate Return Path and Mitigate the Inter-Symbol Interference (ISI) for Next Generation High Bandwidth Memory

Abstract

In this paper, we propose, analyze and design a through silicon via (TSV) with a passive equalizer (PEQ) to mitigate the inter-symbol interference (ISI) and separate the return path for next-generation high bandwidth memory (HBM). The proposed HBM TSV includes a PEQ into the region between the signal TSV and ground TSV. We suggest the two-design structure of PEQ using the inductance and resistance. The proposed HBM TSV with PEQ provides two advantages. First, ISI can be suppressed by increasing the bandwidth or reducing the reflection caused by multi-drop topology. Second, the crosstalk can be reduced by separating return paths between the different signal TSVs. Based on the analytical modeling, the physical meaning of the proposed HBM TSV is presented. The channel loss, group delay, crosstalk, and time domain waveform are analyzed in terms of signal integrity for the proposed HBM TSV. Analysis and design method of the proposed HBM TSV are suggested to find an optimization point to define the resistance, inductance, and position of the PEQ. The proposed HBM TSV is evaluated based on the eye-diagram. Finally, from the practical point of view, the proposed HBM TSV fabrication process is also described.