An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm

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This paper presents an 86. 71875GHz R transceiver IC featuring a fully integrated clock and data recovery (CDR)-assisted carrier synchronization loop for waveguide links. The IC fabricated in 28nm CMOS demonstrates 57. 8125Gb/s PAM-4 data transmission over a 1. 5m waveguide channel. The proposed carrier synchronization can be achieved only by using a base-band CDR without using power-and-area-hungry RF circuits. The test chip achieves the best figure of merit (FoM) of 3. 5pJ/b/m in terms of throughput-distance, and energy efficiency compared to the prior art.
Publisher
IEEE
Issue Date
2023-09-11
Language
English
Citation

ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)

ISSN
1930-8833
DOI
10.1109/esscirc59616.2023.10268802
URI
http://hdl.handle.net/10203/315855
Appears in Collection
EE-Conference Papers(학술회의논문)
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