Block-Level Power Net Routing of Analog Circuit Using Reinforcement Learning

Abstract

A mixed-signal IC consists of a number of blocks driven by one or more supply voltages. Power net routing determines power wire width and routing path in such a way that routing area is minimized and IR-drop constraints are all satisfied. We propose two-stage power net routing, consisting of trial- and main-routing. In trial routing, reinforcement learning (RL) is applied to find the routing path and wire width assuming larger routing grids. In main routing, we take each net one by one and apply integer linear programming (ILP) to determine the exact path along much smaller grids, while the result from trial routing is respected. Experiments with a few test circuits indicate that the proposed method yields on average of 11% smaller routing area compared to the state-of-the-art method; IR-drop constraints are all satisfied while only 87% are satisfied with the state-of-the-art.