High-speed and low-power OOK CMOS transmitter and receiver for wireless chip-to-chip communication

Abstract

This paper presents a high-speed and low-power on-off keying (OOK) transmitter and receiver for wireless chip-to-chip communication implemented in 65 nm CMOS. These direct-conversion transmitter and non-coherent receiver operate with 80 GHz carrier frequency. The transmitter consists of the current-reused modulator and the 80 GHz push-push VCO for low power consumption, and the receiver consists of the wideband low-noise amplifier and gain-boosting demodulator for wide bandwidth. The transmitter and receiver consume 18 mW and 46 mW, respectively, and achieve 12 Gbps wireless data transmission over 1.2 cm distance with the bit error rate less than 10-11 for 27-1 pseudorandom binary sequence. As a result, the transmitter and receiver achieve 4.5 pJ/bit, which is the lowest bit-energy efficiency among the state-of-the-art works.