DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kang, H.-J. | - |
dc.contributor.author | Park, In-Cheol | - |
dc.date.accessioned | 2008-02-21T06:16:31Z | - |
dc.date.available | 2008-02-21T06:16:31Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2001-05-06 | - |
dc.identifier.citation | IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.2, no., pp.693 - 696 | - |
dc.identifier.issn | 0271-4310 | - |
dc.identifier.uri | http://hdl.handle.net/10203/3129 | - |
dc.language | ENG | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE | - |
dc.title | Multiplier-less IIR filter synthesis algorithms to trade-off the delay and the number of adders | - |
dc.type | Conference | - |
dc.identifier.scopusid | 2-s2.0-0034998484 | - |
dc.type.rims | CONF | - |
dc.citation.volume | 2 | - |
dc.citation.beginningpage | 693 | - |
dc.citation.endingpage | 696 | - |
dc.citation.publicationname | IEEE International Symposium on Circuits and Systems (ISCAS 2001) | - |
dc.identifier.conferencecountry | Australia | - |
dc.identifier.conferencecountry | Australia | - |
dc.contributor.localauthor | Park, In-Cheol | - |
dc.contributor.nonIdAuthor | Kang, H.-J. | - |
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