Policy Gradient Reinforcement Learning-based Optimal Decoupling Capacitor Design Method for 2.5-D/3-D ICs using Transformer Network

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dc.contributor.authorPark, Hyunwookko
dc.contributor.authorKim, Minsuko
dc.contributor.authorKim, Subinko
dc.contributor.authorJeong, Seungtaekko
dc.contributor.authorKim, Seonggukko
dc.contributor.authorKang, Hyungminko
dc.contributor.authorKim, Keunwooko
dc.contributor.authorSon, Keeyoungko
dc.contributor.authorPark, Gapyeolko
dc.contributor.authorSon, Kyungjuneko
dc.contributor.authorShin, Taeinko
dc.contributor.authorKim, Jounghoko
dc.date.accessioned2023-07-24T06:00:13Z-
dc.date.available2023-07-24T06:00:13Z-
dc.date.created2023-07-07-
dc.date.issued2020-12-
dc.identifier.citation2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020-
dc.identifier.issn2151-1225-
dc.identifier.urihttp://hdl.handle.net/10203/310776-
dc.description.abstractIn this paper, we first propose a policy gradient reinforcement learning (RL)-based optimal decoupling capacitor (decap) design method for 2.5-D/3-D integrated circuits (ICs) using a transformer network. The proposed method can provide an optimal decap design that meets target impedance. Unlike previous value-based RL methods with simple value approximators such as multi-layer perceptron (MLP) and convolutional neural network (CNN), the proposed method directly parameterizes policy using an attention-based transformer network model. The model is trained through the policy gradient algorithm so that it can achieve larger action space, i.e. search space. For verification, we applied the proposed method to a test hierarchical power distribution network (PDN). We compared convergence results depending on the action space with the previous value-based RL method. As a result, it is validated that the proposed method can cover ×4 times larger action space than that of the previous work.-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titlePolicy Gradient Reinforcement Learning-based Optimal Decoupling Capacitor Design Method for 2.5-D/3-D ICs using Transformer Network-
dc.typeConference-
dc.identifier.scopusid2-s2.0-85099792068-
dc.type.rimsCONF-
dc.citation.publicationname2020 IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2020-
dc.identifier.conferencecountryCC-
dc.identifier.conferencelocationVirtual-
dc.identifier.doi10.1109/EDAPS50281.2020.9312908-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorKim, Minsu-
dc.contributor.nonIdAuthorKim, Subin-
dc.contributor.nonIdAuthorJeong, Seungtaek-
dc.contributor.nonIdAuthorKim, Seongguk-
dc.contributor.nonIdAuthorKang, Hyungmin-
dc.contributor.nonIdAuthorKim, Keunwoo-
dc.contributor.nonIdAuthorSon, Keeyoung-
dc.contributor.nonIdAuthorPark, Gapyeol-
dc.contributor.nonIdAuthorSon, Kyungjune-
dc.contributor.nonIdAuthorShin, Taein-
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