DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Yoo, Hoi-Jun | - |
dc.contributor.advisor | 유회준 | - |
dc.contributor.author | Ha, Sangwoo | - |
dc.date.accessioned | 2023-06-26T19:34:26Z | - |
dc.date.available | 2023-06-26T19:34:26Z | - |
dc.date.issued | 2022 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1008373&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/309979 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2022.8,[iii, 22 p. :] | - |
dc.description.abstract | Computing-in-memory (CIM) shows high energy-efficiency through the analog DNN computation inside the memory macros. However, as the DNN size increases, the energy-efficiency of CIM is reduced by external memory access (EMA). One of the promising solutions is eDRAM based CIM to increase memory capacity with a high density cell. Although the eDRAM-CIM has a higher density than the SRAM-CIM, it suffers from both poor robustness and a low signal-to-noise ratio (SNR). In this work, the energy-efficient eDRAM-CIM macro is proposed while improving computational robustness and SNR with three key features: 1) High SNR voltage-based accumulation with segmented BL architecture (SBLA), resulting in 17.1 dB higher SNR, 2) canceling PVT/leakage-induced error with common-mode error canceling (CMEC) circuit, resulting in 51.4% PVT variation reduction and 51.4% refresh power reduction, 3) a ReLU-based zero-gating ADC (ZG-ADC), resulting in ADC power reduction up to 58.1%. According to these new features, the proposed eDRAM-CIM macro achieves 81.5-to-115.0 TOPS/W energy-efficiency with 209-to-295 μW power consumption when 4b×4b MAC operation is performed with 250 MHz core frequency. The proposed macro also achieves 91.52% accuracy at the CIFAR-10 object classification dataset (ResNet-20) without accuracy drop even with PVT variation. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Leakage current▼aComputing-in-memory(CIM)▼aEmbedded DRAM▼aSNR▼aPVT | - |
dc.subject | 누설전류▼a인메모리 컴퓨팅▼aeDRAM▼a신호 대 잡음비 (SNR)▼aPVT | - |
dc.title | (A) high SNR and PVT/leakage-robust eDRAM computing-in-memory macro | - |
dc.title.alternative | 높은 SNR 및 PVT/누설전류에 강건한 eDRAM기반 인메모리 컴퓨팅 마크로 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전기및전자공학부, | - |
dc.contributor.alternativeauthor | 하상우 | - |
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