(A) low power voltage step-up system for NAND flash

Abstract

After the 4th Industrial Revolution, technologies incorporating advanced information and communication technologies have processed a lot of data and provided it to users. SSD based on NAND flash has replaced traditional storage devices, and despite the high capacity of NAND flash, it is necessary to secure low power consumption. This thesis presents an energy-efficient word line driver for a triple-level cell 3D NAND flash. Unlike a conventional circuit with a large charge pump and high-voltage regulators operating under the inefficient stepped-up voltage, the proposed circuit has a distributed charge pump that directly drives the word lines, aided by a charge compensating regulator that operates under the nominal supply and produces a ripple-free output. The proposed voltage step-up system for modeled 39-word line layers with the 2-string of 3D NAND flash is verified with the 180nm UHV process. The energy efficiency is improved compared to the conventional system during the 1 unit program pulse and verify period.