Energy-efficient analog circuit techniques for mobile applications모바일 애플리케이션을 위한 에너지 효율적인 아날로그 회로 기술

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[Chapter 1: An Energy-Efficient Three-Stage Amplifier Achieving a High Unity-Gain Bandwidth for Large Capacitive Loads without Using a Compensation Zero] This work presents a high-gain energy-efficient three-stage amplifier which employs buffering-based pole relocation and a dual-path structure (BPR-DP). The proposed design does not rely on the introduction of compensation zero and preserves the unity-gain bandwidth of the Miller compensation loop, thus improving $FOM_L$ by 1.36 times, $LC$-$FOM_S$ by 1.26 times, and $LC$-$FOM_L$ by 3.18 times, as well as the robustness of performance, compared to the state-of-the-art designs. [Chapter 2: A 96.6%-Efficiency Continuous-Input-Current Hybrid Dual-Path Buck-Boost Converter with Single-Mode Operation and Non-Stopping Output Current Delivery] This work presents a hybrid dual-path Buck-Boost DC-DC converter (DPBB) achieving high power efficiency for the entire input voltage ($V_{IN}$) range (2.8 to 4.2V) from a Li-ion battery for mobile applications. Unlike conventional non-inverting buck-boost converters (CBB), the proposed DPBB supplies a load current ($I_{LOAD}$) at all phases by using the inductor path (L-path) and capacitor path (C-path) alternately. As a result, our design achieves high efficiency by reducing conduction losses and suppresses the output voltage ($V_{OUT}$) ripple. It has only a single control mode over the whole $V_{IN}$ range, unlike the previous designs that require complex mode transitions. Note that high efficiency is achieved not only across a wide $I_{LOAD}$ range but also over a wide VIN range. The proposed DPBB achieves 96.6% peak efficiency with the smallest difference between the maximum and minimum efficiencies over a given range of $I_{LOAD}$ and $V_{IN}$. [Chapter 3: A 95.4%-Efficiency Continuous-Output Current Hybrid Buck-Boost Converter with Enhanced Transient Speed and Suppressed Transition Loss for Dynamic Voltage Scaling at 1.94μs/V Rate] This work presents a single-mode buck-boost converter for fast and energy-efficient DVS operation. It is based on a hybrid structure combining a 1:2 charge pump and a buck converter to obtain a wide input voltage range from 0 to 2$V_{IN}$, reduced inductor current (= $I_{LOAD}$) for all duty conditions, fast loop dynamics, and minimal transition loss. Employing the proposed transient speed enhancement circuit, it achieves a fast DVS rate of 1.94μs/V and high peak efficiency of 95.4% simultaneously.
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2022
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2022.2,[v, 55 p. :]

Keywords

Three-stage amplifier▼aBPR-DP▼aMiller compensation▼aDPBB▼aDual-Path▼aNo mode transition▼aDVS▼aTransient speed enhancement circuit; 3단 증폭기▼a밀러 보상▼a이중경로▼a컨버터▼a동적 전압 스케일링

URI
http://hdl.handle.net/10203/309181
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1000290&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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