A 16-Channel Impedance-Readout IC With Synchronous Sampling and Baseline Cancelation for Fast Neural Electrical Impedance Tomography

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Fast neural electrical impedance tomography (EIT) is a promising method to not only record neural activities but also to localize them in peripheral nerves in a minimally invasive way. A much higher image frame rate is required for this application than conventional impedance measurement applications, which generally adopt the I/Q demodulation technique. To achieve a high-enough frame rate to capture neural activities along the peripheral nerve fascicle, this letter proposes synchronous sampling (SS) and fast baseline tracking based on successive approximation (SA). The SS method needs an injection of only a single or a few periods of square-wave current signal for the amplitude measurement by synchronously sampling the received voltage signal. The proposed SA-based baseline tracking provides fast signal recovery from unwanted motion artifacts or baseline drifts. The designed readout circuit uses a two-step conversion where its coarse bits are generated from a current-based baseline cancelation circuit and its fine bits from a following SAR ADC. Thanks to the baseline tracking based on the SS and SA, the proposed IC achieves a faster frame rate of 312 fps with continuous baseline update and 500 fps with constant baseline compared to state-of-the-art works. The implemented IC is validated by measuring a water-filled tank and reconstructing its tomographic image. The results show successful discrimination of varied impedance areas over the tank.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2023
Language
English
Article Type
Article
Citation

IEEE SOLID-STATE CIRCUITS LETTERS, v.6, pp.109 - 112

ISSN
2573-9603
DOI
10.1109/LSSC.2023.3265678
URI
http://hdl.handle.net/10203/307219
Appears in Collection
EE-Journal Papers(저널논문)
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