DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Sangyeob | ko |
dc.contributor.author | Kim, Sangjin | ko |
dc.contributor.author | Um, Soyeon | ko |
dc.contributor.author | Kim, Soyeon | ko |
dc.contributor.author | Kim, Kwantae | ko |
dc.contributor.author | Yoo, Hoi-Jun | ko |
dc.date.accessioned | 2023-01-12T11:02:45Z | - |
dc.date.available | 2023-01-12T11:02:45Z | - |
dc.date.created | 2023-01-09 | - |
dc.date.issued | 2022-06 | - |
dc.identifier.citation | 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, pp.38 - 39 | - |
dc.identifier.issn | 0743-1562 | - |
dc.identifier.uri | http://hdl.handle.net/10203/304368 | - |
dc.description.abstract | An energy-efficient neuromorphic computing-in-memory (CIM) processor is proposed with four key features: 1) Most significant bit (MSB) Word Skipping to reduce the BL activity; 2) Early Stopping to enable lower BL activity; 3) Mixed-mode firing for multi-macro aggregation; 4) Voltage Folding to extend the dynamic range. The proposed CIM achieves state-of-the-art energy efficiency of 62.1 TOPS/W (I=4b, W=8b) and 310.4 TOPS/W (I=4b, W=1b). | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing | - |
dc.type | Conference | - |
dc.identifier.scopusid | 2-s2.0-85135235892 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 38 | - |
dc.citation.endingpage | 39 | - |
dc.citation.publicationname | 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | Honolulu | - |
dc.identifier.doi | 10.1109/VLSITechnologyandCir46769.2022.9830276 | - |
dc.contributor.localauthor | Yoo, Hoi-Jun | - |
dc.contributor.nonIdAuthor | Kim, Kwantae | - |
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