DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Beomsik | ko |
dc.contributor.author | Hwang, Ranggi | ko |
dc.contributor.author | Yoon, Dongho | ko |
dc.contributor.author | Choi, Yoonhyuk | ko |
dc.contributor.author | Rhu, Minsoo | ko |
dc.date.accessioned | 2022-11-24T10:00:52Z | - |
dc.date.available | 2022-11-24T10:00:52Z | - |
dc.date.created | 2022-11-20 | - |
dc.date.created | 2022-11-20 | - |
dc.date.created | 2022-11-20 | - |
dc.date.issued | 2022-10-05 | - |
dc.identifier.citation | The 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, pp.1200 - 1217 | - |
dc.identifier.issn | 1072-4451 | - |
dc.identifier.uri | http://hdl.handle.net/10203/300883 | - |
dc.description.abstract | The widespread deployment of machine learning (ML) is raising serious concerns on protecting the privacy of users who contributed to the collection of training data. Differential privacy (DP) is rapidly gaining momentum in the industry as a practical standard for privacy protection. Despite DP's importance, however, little has been explored within the computer systems community regarding the implication of this emerging ML algorithm on system designs. In this work, we conduct a detailed workload characterization on a state-of-the-art differentially private ML training algorithm named DPSGD. We uncover several unique properties of DP-SGD (e.g., its high memory capacity and computation requirements vs. non-private ML), root-causing its key bottlenecks. Based on our analysis, we propose an accelerator for differentially private ML named DiVa, which provides a significant improvement in compute utilization, leading to 2.6× higher energy-efficiency vs. conventional systolic arrays. | - |
dc.language | English | - |
dc.publisher | IEEE/ACM | - |
dc.title | DiVa: An Accelerator for Differentially Private Machine Learning | - |
dc.type | Conference | - |
dc.identifier.wosid | 000886530600070 | - |
dc.identifier.scopusid | 2-s2.0-85141689546 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 1200 | - |
dc.citation.endingpage | 1217 | - |
dc.citation.publicationname | The 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022 | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | Chicago, IL | - |
dc.identifier.doi | 10.1109/MICRO56248.2022.00084 | - |
dc.contributor.localauthor | Rhu, Minsoo | - |
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