DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chang, Dong Jin | ko |
dc.contributor.author | Ryu, Seung-Tak | ko |
dc.date.accessioned | 2022-11-15T05:01:54Z | - |
dc.date.available | 2022-11-15T05:01:54Z | - |
dc.date.created | 2022-09-27 | - |
dc.date.issued | 2022-06 | - |
dc.identifier.citation | 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, pp.174 - 175 | - |
dc.identifier.issn | 0743-1562 | - |
dc.identifier.uri | http://hdl.handle.net/10203/299624 | - |
dc.description.abstract | An on-chip background skew calibration technique for time-interleaved (TI) ADCs with relative-prime rotation (RPR) based autocorrelation computation is presented, with which more flexible choice of number of channels and no residual skew accumulation are realized. An 8 × TI 10b 1.4GS/s prototype ADC with fully on-chip calibration achieves an SNDR of 48.2dB at over Nyquist input and a FoM of 33 fJ/c-s in 28-nm FDSOI. The on-chip calibration circuitry takes only 24% of the ADC-core power consumption. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | A Relative-Prime Rotation Based Fully On-Chip Background Skew Calibration for Time-Interleaved ADCs | - |
dc.type | Conference | - |
dc.identifier.scopusid | 2-s2.0-85135221453 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 174 | - |
dc.citation.endingpage | 175 | - |
dc.citation.publicationname | 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | Honolulu | - |
dc.identifier.doi | 10.1109/VLSITechnologyandCir46769.2022.9830416 | - |
dc.contributor.localauthor | Ryu, Seung-Tak | - |
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