Tunable and Reconfigurable Logic Gates With Electrolyte-Gated Transistor Array Co-Integrated With Neuromorphic Synapses

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dc.contributor.authorYu, Ji-Manko
dc.contributor.authorLee, Chungryeolko
dc.contributor.authorHan, Joon-Kyuko
dc.contributor.authorLee, Sang-Wonko
dc.contributor.authorKim, Moon-Seokko
dc.contributor.authorIm, Sung Gapko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2022-08-05T01:00:27Z-
dc.date.available2022-08-05T01:00:27Z-
dc.date.created2022-05-30-
dc.date.created2022-05-30-
dc.date.issued2022-08-
dc.identifier.citationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.8, pp.4231 - 4235-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10203/297824-
dc.description.abstractA tunable and reconfigurable logic gates based on an electrolyte-gated transistor (EGT) array are co-integrated with neuromorphic synapses. The tunable and reconfigurable operations of the various logic gates are controlled by analog conductance modulation with nonvolatility of the fabricated EGT. The EGT array was uniformly fabricated on an entire 4-in wafer with the aid of CMOS compatible processes. Initiated-chemical vapor deposition (i-CVD) method was adopted for the deposition of the ultrathin polyethylene glycol dimethacrylate (pEGDMA) electrolyte layer. Therefore, the logic gates could be co-integrated with synaptic devices on the same in-plane substrate for integrability. Basic inverter operation with switching threshold tunability ranging from 1 to 1 V was demonstrated with good operational stability. In addition, NAND and NOR gate operations were realized by modulating the conductance level of a specified cell in the array configuration.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleTunable and Reconfigurable Logic Gates With Electrolyte-Gated Transistor Array Co-Integrated With Neuromorphic Synapses-
dc.typeArticle-
dc.identifier.wosid000826416700001-
dc.identifier.scopusid2-s2.0-85131750706-
dc.type.rimsART-
dc.citation.volume69-
dc.citation.issue8-
dc.citation.beginningpage4231-
dc.citation.endingpage4235-
dc.citation.publicationnameIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.identifier.doi10.1109/TED.2022.3179460-
dc.contributor.localauthorIm, Sung Gap-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorBoolean logic gate-
dc.subject.keywordAuthorelectrolyte gated transistor (EGT)-
dc.subject.keywordAuthornonvolatile memory-
dc.subject.keywordAuthorreconfigurable logic-
dc.subject.keywordAuthorthreshold tunability-
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