A Steep-Slope Phenomenon by Gate Charge Pumping in a MOSFET

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dc.contributor.authorKim, Myung-Suko
dc.contributor.authorYun, Gyeong-Junko
dc.contributor.authorKim, Wu-Kangko
dc.contributor.authorSeo, Myungsooko
dc.contributor.authorKim, Da-Jinko
dc.contributor.authorYu, Ji-Manko
dc.contributor.authorHan, Joon-Kyuko
dc.contributor.authorHur, Jaeko
dc.contributor.authorLee, Geon-Beomko
dc.contributor.authorKim, Seong-Yeonko
dc.contributor.authorYun, Dae-Hwanko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2022-04-24T02:00:13Z-
dc.date.available2022-04-24T02:00:13Z-
dc.date.created2022-02-16-
dc.date.created2022-02-16-
dc.date.created2022-02-16-
dc.date.issued2022-04-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.43, no.4, pp.521 - 524-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/295861-
dc.description.abstractA steep-slope phenomenon is experimentally demonstrated and analyzed with a novel FET referred to as a charge pump FET (CP-FET) by using transient switching of the floating gate voltage. It is also analytically modeled and verified by simulation. The CP-FET, which is very similar to a flash memory cell structure composed of a floating gate, was fabricated with 100 % CMOS microfabrication. The transition layer in the CP-FET is analogous to a blocking oxide in a floating gate memory device. Transient switching of the floating gate voltage is achieved by two factors. One is capacitance mismatching between a control gate and the floating gate, which is realized by designing the area of the transition layer to be smaller than that of the floating gate. The other is charge pumping to the floating gate by use of the current flowing through the transition layer.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA Steep-Slope Phenomenon by Gate Charge Pumping in a MOSFET-
dc.typeArticle-
dc.identifier.wosid000792918100008-
dc.identifier.scopusid2-s2.0-85124773138-
dc.type.rimsART-
dc.citation.volume43-
dc.citation.issue4-
dc.citation.beginningpage521-
dc.citation.endingpage524-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2022.3151077-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.contributor.nonIdAuthorYun, Gyeong-Jun-
dc.contributor.nonIdAuthorKim, Wu-Kang-
dc.contributor.nonIdAuthorSeo, Myungsoo-
dc.contributor.nonIdAuthorKim, Seong-Yeon-
dc.contributor.nonIdAuthorYun, Dae-Hwan-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorMOSFET-
dc.subject.keywordAuthorNonvolatile memory-
dc.subject.keywordAuthorLogic gates-
dc.subject.keywordAuthorCharge pumps-
dc.subject.keywordAuthorCapacitance-
dc.subject.keywordAuthorSwitches-
dc.subject.keywordAuthorTransient analysis-
dc.subject.keywordAuthorTransient switching-
dc.subject.keywordAuthorcontrol gate-
dc.subject.keywordAuthorfloating gatecharge pump FET-
dc.subject.keywordAuthorsteep-slope-
dc.subject.keywordAuthortransition layer-
dc.subject.keywordPlusFIELD-EFFECT TRANSISTOR-
dc.subject.keywordPlusNEGATIVE CAPACITANCE-
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