DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Hyun-Jung | ko |
dc.contributor.author | Lee, Geon-Beom | ko |
dc.contributor.author | Han, Joon-Kyu | ko |
dc.contributor.author | Han, Seong-Joo | ko |
dc.contributor.author | Kim, Da-Jin | ko |
dc.contributor.author | Yu, Ji-Man | ko |
dc.contributor.author | Kim, Myung-Su | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2022-04-14T06:45:51Z | - |
dc.date.available | 2022-04-14T06:45:51Z | - |
dc.date.created | 2022-02-28 | - |
dc.date.created | 2022-02-28 | - |
dc.date.created | 2022-02-28 | - |
dc.date.issued | 2022-03 | - |
dc.identifier.citation | IEEE ELECTRON DEVICE LETTERS, v.43, no.3, pp.370 - 373 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | http://hdl.handle.net/10203/292777 | - |
dc.description.abstract | The 1-transistor-DRAM (1T-DRAM) with a floating body is iteratively operated and deteriorated as the number of programming cycles is increased. This aging results an increase in the interface trap density ( Nit) . Internal electro-thermal annealing (ETA) using Joule heat generated by punch-through current flowing from the source via the channel to the drain, reduces the Nit and eventually cures the operating damage of the 1T-DRAM. To quantitatively analyze the Nit before and after curing, a synchronized optical charge pumping (SOCP) method that is applicable even to a floating body (FB) device, was used. By adopting self-curing during 1T-DRAM operations, endurance was notably increased by reducing Nit . It is expected that aged 1T-DRAMs can be recovered when such ETA is enabled at the moment of system rebooting. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Curing of 1-Transistor-DRAM by Joule Heat From Punch-Through Current | - |
dc.type | Article | - |
dc.identifier.wosid | 000761656500012 | - |
dc.identifier.scopusid | 2-s2.0-85124077747 | - |
dc.type.rims | ART | - |
dc.citation.volume | 43 | - |
dc.citation.issue | 3 | - |
dc.citation.beginningpage | 370 | - |
dc.citation.endingpage | 373 | - |
dc.citation.publicationname | IEEE ELECTRON DEVICE LETTERS | - |
dc.identifier.doi | 10.1109/LED.2022.3147259 | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.contributor.nonIdAuthor | Kim, Hyun-Jung | - |
dc.contributor.nonIdAuthor | Han, Seong-Joo | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | StressLogic gatesCuringHeating systemsTemperature measurementGallium arsenideField effect transistorsCuringelectro-thermal annealing (ETA)floating body (FB)gate-all-around (GAA)hot-carrier injection (HCI)interface trap densityJoule heat1-transistor-DRAM (1T-DRAM)single transistor latch (STL)punch-throughsynchronized optical charge pumping (SOCP) | - |
dc.subject.keywordPlus | LEAKAGE CURRENTMODEL | - |
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