INTEGRATED CIRCUIT, ELECTRONIC DEVICE INCLUDING THE SAME, AND OPERATING METHOD THEREOF분수형 위상 고정 루프에서 디지털-시간 변환기의 비선형성에 의한 프랙셔널 스퍼 발생을 저지하는 코드생성법

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Disclosed is an integrated circuit, which includes a DTC block including DTCs, receiving a first reference signal and a first division signal, and outputting a second reference signal and a second division signal based on the first reference signal, the first division signal, and control codes, a TDC comparing phases of the second reference signal and the second division signal and outputting a comparison signal, a digital loop filter filtering the comparison signal, an oscillator generating an output signal based on the filtered comparison signal, a delta-sigma modulator outputting a first signal and a quantized noise signal based on first and second division ratio signals, a divider dividing a frequency of the output signal based on the first signal and outputting the first division signal, and a probability modulator generating the control codes based on the quantized noise signal. Probability density functions of the control codes are time-invariant.
Assignee
KAIST
Country
US (United States)
Application Date
2021-01-27
Application Number
17159197
Registration Date
2022-03-08
Registration Number
11271584
URI
http://hdl.handle.net/10203/292367
Appears in Collection
EE-Patent(특허)
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