Systematic Control of Negative Transconductance in Organic Heterojunction Transistor for High-performance, Low-power Flexible Ternary Logic Circuits

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dc.contributor.author이충열ko
dc.contributor.author최준환ko
dc.contributor.author이창현ko
dc.contributor.author김창현ko
dc.contributor.author유호천ko
dc.contributor.author임성갑ko
dc.date.accessioned2021-11-17T06:46:05Z-
dc.date.available2021-11-17T06:46:05Z-
dc.date.created2021-11-16-
dc.date.issued2021-10-22-
dc.identifier.citation한국고분자학회 추계학술대회-
dc.identifier.urihttp://hdl.handle.net/10203/289232-
dc.description.abstractOrganic multi-valued logic (MVL) circuits can substantially improve the data processing efficiency in highly advanced wearable electronics. Organic ternary logic circuits can be implemented by utilizing the negative transconductance (NTC) of heterojunction transistors (HJTs). To achieve high-performance organic ternary logic circuits, the range of NTC in HJTs must be optimized in advance to ensure the well-defined intermediate logic state in ternary logic inverters (T-inverters). Herein, simple and efficient strategy, which enables the systematic control of the range and position of NTC in H-TRs is presented. Based on the semiconductor thickness variation and asymmetric S/D electrodes, the T-inverter exhibits full-swing operation with three distinguishable logic states, resulting in high static noise margin. Moreover, a flexible T-inverter with an ultrathin polymer dielectric is demonstrated, whose operating voltage was less than 8 V.-
dc.languageEnglish-
dc.publisher한국고분자학회-
dc.titleSystematic Control of Negative Transconductance in Organic Heterojunction Transistor for High-performance, Low-power Flexible Ternary Logic Circuits-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.publicationname한국고분자학회 추계학술대회-
dc.identifier.conferencecountryKO-
dc.identifier.conferencelocation경주화백컨벤션센터-
dc.contributor.localauthor임성갑-
dc.contributor.nonIdAuthor김창현-
dc.contributor.nonIdAuthor유호천-
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CBE-Conference Papers(학술회의논문)
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