120-GHz Wideband I/Q Receiver Based on Baseband Equalizing Technique

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dc.contributor.authorJang, Taehwanko
dc.contributor.authorKang, Dong Minko
dc.contributor.authorKim, SeungHunko
dc.contributor.authorLee, Chaejunko
dc.contributor.authorJun, Seongbaeko
dc.contributor.authorPark, Hyuncheolko
dc.contributor.authorKim, Joonhyungko
dc.contributor.authorPark, Chul Soonko
dc.date.accessioned2021-06-12T07:10:13Z-
dc.date.available2021-06-12T07:10:13Z-
dc.date.created2020-11-24-
dc.date.created2020-11-24-
dc.date.created2020-11-24-
dc.date.issued2021-06-
dc.identifier.citationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.6, pp.1697 - 1710-
dc.identifier.issn0018-9200-
dc.identifier.urihttp://hdl.handle.net/10203/285793-
dc.description.abstractIn this study, we examined a 120-GHz wideband I/Q receiver based on a baseband equalizing amplifier using 40-nm complementary metal oxide semiconductor (CMOS) technology. For low-power operation, the receiver chipset is integrated based on the direct conversion structure. To achieve high data-rate wireless communication, the receiver utilizes a frequency equalizing technique between the low noise amplifier (LNA)-mixer and baseband amplifier. With the proposed technique, the estimated overall bandwidth is increased as wider as 5 GHz. The 3-dB conversion gain bandwidth is 26 GHz, noise figure (NF) is 10.8 dB, and dc power consumption is 153.4 mW. For the dual-mode operation, the variable gain of the baseband amplifier is applied, and the conversion gain of the proposed receiver is 28.2 dB for the high gain mode and 14.8 dB for the low gain mode. The chip area of the receiver is 1.5 mm². The proposed receiver exhibits a maximum data-rate of 12.5, 16, and 16 Gb/s for binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), and 16-quadrature amplitude modulation (16-QAM), respectively.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.title120-GHz Wideband I/Q Receiver Based on Baseband Equalizing Technique-
dc.typeArticle-
dc.identifier.wosid000655248000004-
dc.identifier.scopusid2-s2.0-85106999027-
dc.type.rimsART-
dc.citation.volume56-
dc.citation.issue6-
dc.citation.beginningpage1697-
dc.citation.endingpage1710-
dc.citation.publicationnameIEEE JOURNAL OF SOLID-STATE CIRCUITS-
dc.identifier.doi10.1109/JSSC.2020.3032022-
dc.contributor.localauthorPark, Hyuncheol-
dc.contributor.localauthorPark, Chul Soon-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorReceivers-
dc.subject.keywordAuthorGain-
dc.subject.keywordAuthorBaseband-
dc.subject.keywordAuthorWideband-
dc.subject.keywordAuthorMetals-
dc.subject.keywordAuthorMixers-
dc.subject.keywordAuthorCapacitors-
dc.subject.keywordAuthorBER-
dc.subject.keywordAuthordirect conversion-
dc.subject.keywordAuthorI-
dc.subject.keywordAuthorQ receiver-
dc.subject.keywordAuthormillimeter wave-
dc.subject.keywordAuthorMMIC-
dc.subject.keywordAuthorwireless communication-
dc.subject.keywordPlusANTIPODAL VIVALDI ANTENNA-
dc.subject.keywordPlusLIMITING AMPLIFIER-
dc.subject.keywordPlusFREQUENCY TRIPLER-
dc.subject.keywordPlusCMOS-
dc.subject.keywordPlusPOWER-
dc.subject.keywordPlusTRANSMITTER-
dc.subject.keywordPlusCHIPSET-
dc.subject.keywordPlusDESIGN-
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