DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Wu-Kang | ko |
dc.contributor.author | Bidenko, Pavlo | ko |
dc.contributor.author | Kim, Jongmin | ko |
dc.contributor.author | Sim, Jaeho | ko |
dc.contributor.author | Han, Joon-Kyu | ko |
dc.contributor.author | Kim, Seongkwang | ko |
dc.contributor.author | Geum, Dae-Myeong | ko |
dc.contributor.author | Kim, Sanghyeon | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2021-05-25T06:10:12Z | - |
dc.date.available | 2021-05-25T06:10:12Z | - |
dc.date.created | 2021-05-25 | - |
dc.date.created | 2021-05-25 | - |
dc.date.issued | 2021-05 | - |
dc.identifier.citation | IEEE ELECTRON DEVICE LETTERS, v.42, no.5, pp.681 - 683 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | http://hdl.handle.net/10203/285327 | - |
dc.description.abstract | A vertical bi-stable resistor (biristor) composed of In0.53Ga0.47As was demonstrated for sub-1 V operation. An inherent small bandgap and a scaled base length of 150 nm led to the remarkable reduction in latch-up voltage compared to Si(Ge)-based conventional biristors. The epitaxially grown n-p-n structure allowed an abrupt p-n junction, which was also very important to reduce the latch-up voltage. Furthermore, the physical mechanism of carrier transport in the InGaAs biristor was explored with TCAD simulations. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Vertical InGaAs Biristor for Sub-1 V Operation | - |
dc.type | Article | - |
dc.identifier.wosid | 000645061400010 | - |
dc.identifier.scopusid | 2-s2.0-85103786476 | - |
dc.type.rims | ART | - |
dc.citation.volume | 42 | - |
dc.citation.issue | 5 | - |
dc.citation.beginningpage | 681 | - |
dc.citation.endingpage | 683 | - |
dc.citation.publicationname | IEEE ELECTRON DEVICE LETTERS | - |
dc.identifier.doi | 10.1109/LED.2021.3070334 | - |
dc.contributor.localauthor | Kim, Sanghyeon | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.contributor.nonIdAuthor | Kim, Wu-Kang | - |
dc.contributor.nonIdAuthor | Bidenko, Pavlo | - |
dc.contributor.nonIdAuthor | Kim, Jongmin | - |
dc.contributor.nonIdAuthor | Sim, Jaeho | - |
dc.contributor.nonIdAuthor | Geum, Dae-Myeong | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Indium gallium arsenide | - |
dc.subject.keywordAuthor | Silicon | - |
dc.subject.keywordAuthor | Epitaxial growth | - |
dc.subject.keywordAuthor | Semiconductor process modeling | - |
dc.subject.keywordAuthor | P-n junctions | - |
dc.subject.keywordAuthor | Latches | - |
dc.subject.keywordAuthor | Indium phosphide | - |
dc.subject.keywordAuthor | 3-D integration | - |
dc.subject.keywordAuthor | abrupt junction artificial neural network | - |
dc.subject.keywordAuthor | epitaxial growth | - |
dc.subject.keywordAuthor | impact ionization | - |
dc.subject.keywordAuthor | InGaAs | - |
dc.subject.keywordAuthor | vertical biristor | - |
dc.subject.keywordPlus | VOLTAGE | - |
dc.subject.keywordPlus | TRANSISTOR | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.