Libra

Abstract

As DRAM has become a bottleneck for supporting memory intensive workloads, new memory technolo- gies (e.g., NVM) that are denser but slower than DRAM and tiered memory system that is composed of DRAM and new memory technology have been introduced. In tiered memory system, high DRAM utilization and minimizing NVM accesses plays an important role in performance because NVM is 2-4 times slower than DRAM. TLB capacity is another bottleneck for memory intensive workloads. To miti- gate the problem, huge pages are essential because it significantly increases TLB coverage and decreases address translation cost. However, we found that partially hot huge pages in tiered memory system make it difficult to achieve both high DRAM utilization and low TLB misses at the same time. We analyze the impact of partially hot huge pages in tiered memory system and show the trade-off between DRAM utilization and address translation cost. We also present Librato balance the trade-off to optimize page migration in tiered memory system. We demonstrate that Libraimproves the performance of real world memory intensive workloads.