(A) low-power in-pixel TRX ASIC for miniaturized 3D ultrasound system

Abstract

We present an area- and power-efficient application-specific integrated circuit (ASIC) for a miniaturized 3-D ultrasound system. The ASIC is designed to transmit pulse and receive echo through a 36-Ch. 2-D piezoelectric Micromachined Ultrasound Transducer (pMUT) array. The 36 Ch. ASIC integrates a transmitter (TX), a receiver (RX), and an analog-to-digital converter (ADC) within the $250-\mu m$ pitch channel while consuming low-power and supporting calibration to compensate for the process variation of the pMUT. The Charge-Recycling High-Voltage TX (CRHV-TX) in standard CMOS generates up to 13.2 $V_{PP}$ pulse while reducing 42.2% peak TX power consumption. Also, each CRHV-TX automatically calibrates excitation voltage according to its acoustic pressure. The dynamic-bit shared ADC (DBS-ADC) shares most-significant-bits (MSBs) among 4 channels based on the signal similarity between adjacent channels. The analog front-end (AFE) with a received signal sensitivity indicator (RSSI) changes its gain adaptively in real-time depending on input signal strength. The entire ASIC consumes 1.14mW/Ch. average power, reduced by 24.9%, with 1-kHz PRF and 3 TX pulses per cycle. The ASIC in $0.18 \mu m$ 1P6M Standard CMOS has been verified with both electrical and acoustic experiments with $a 6 \times 6$ pMUT array.