Logic Device Based on Skyrmion Annihilation

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dc.contributor.authorSong, Moojuneko
dc.contributor.authorPark, Min Gyuko
dc.contributor.authorKo, Sanko
dc.contributor.authorJang, Sung Kyuko
dc.contributor.authorJe, Minkyuko
dc.contributor.authorKim, Kab-Jinko
dc.date.accessioned2021-04-20T02:10:06Z-
dc.date.available2021-04-20T02:10:06Z-
dc.date.created2021-04-19-
dc.date.created2021-04-19-
dc.date.created2021-04-19-
dc.date.issued2021-04-
dc.identifier.citationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.68, no.4, pp.1939 - 1943-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10203/282457-
dc.description.abstractSkyrmion-based devices are an attractive candidate for nonvolatile memory and low-power computation. In a real device, however, skyrmions easily annihilate at device edges, which hampers device applications. Here, we present a novel skyrmion-based logic device, which takes advantage of the skyrmion annihilation (SA) and increases the efficiency of logic operation. An SA half adder (HA) is implemented in a ferromagnet/heavy metal nanotrack by introducing a geometric notch that annihilates the skyrmion. In addition, full adder and n-bit SA ripple-carry adder are demonstrated by directly cascading the SA HAs. The prototype of a 32-bit SA ripple-carry adder consumes energy as low as 0.62 pJ per each operation, which is only 18% of the previously proposed skyrmion adder. Our SA logic gate can, therefore, be a promising candidate for the beyond-CMOS logic device.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleLogic Device Based on Skyrmion Annihilation-
dc.typeArticle-
dc.identifier.wosid000633331000084-
dc.identifier.scopusid2-s2.0-85100863203-
dc.type.rimsART-
dc.citation.volume68-
dc.citation.issue4-
dc.citation.beginningpage1939-
dc.citation.endingpage1943-
dc.citation.publicationnameIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.identifier.doi10.1109/TED.2021.3055157-
dc.contributor.localauthorJe, Minkyu-
dc.contributor.localauthorKim, Kab-Jin-
dc.contributor.nonIdAuthorPark, Min Gyu-
dc.contributor.nonIdAuthorKo, San-
dc.contributor.nonIdAuthorJang, Sung Kyu-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorLogic gates-
dc.subject.keywordAuthorlow-power electronics-
dc.subject.keywordAuthorskyrmion-
dc.subject.keywordAuthorskyrmion annihilation (SA) logic gate-
dc.subject.keywordAuthorspintronics-
dc.subject.keywordAuthortopology-
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