A Stateful Logic Family Based on a New Logic Primitive Circuit Composed of Two Antiparallel Bipolar Memristors

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dc.contributor.authorXu, Nuoko
dc.contributor.authorPark, Tae Gyunko
dc.contributor.authorKim, Hae Jinko
dc.contributor.authorShao, Xinglongko
dc.contributor.authorYoon, Kyung Jeanko
dc.contributor.authorPark, Tae Hyungko
dc.contributor.authorFang, Liangko
dc.contributor.authorKim, Kyung Minko
dc.contributor.authorHwang, Cheol Seongko
dc.date.accessioned2021-02-19T05:10:05Z-
dc.date.available2021-02-19T05:10:05Z-
dc.date.created2020-06-24-
dc.date.created2020-06-24-
dc.date.created2020-06-24-
dc.date.issued2020-01-
dc.identifier.citationADVANCED INTELLIGENT SYSTEMS, v.2, no.1, pp.1900082-
dc.identifier.issn2640-4567-
dc.identifier.urihttp://hdl.handle.net/10203/280885-
dc.description.abstractStateful logic enables highly energy‐efficient computation because the time and energy consumption for data transfer between the memory and the processing units in the traditional computation system can significantly be saved due to the combined functionalities of logic operation and nonvolatile memory. The logic primitive circuit, usually composed of resistive switching memory or memristor units, is the fundamental and kernel element to build a stateful logic family. However, the current stateful logic primitive circuits cannot be configured between the devices from the adjacent layers of the 3D crossbar array (CBA) which largely limited its application in high‐density and capacity memory arrays. Herein, a new stateful logic primitive circuit is presented based on the structure of two antiparallel bipolar memristors. The presented logic primitive circuit enables a complete set of stateful logic operation and is compatible with a 3D CBA. The working principle and validity of the logic design were experimentally demonstrated by either a real TiO2‐based memristive circuit or the HSPICE simulation. Furthermore, a space‐time‐wise cascading method was demonstrated by XOR and the full adder functions based on a CBA, and its merits were further elucidated through comparison with different logic families with various cascading methods.-
dc.languageEnglish-
dc.publisherWILEY-
dc.titleA Stateful Logic Family Based on a New Logic Primitive Circuit Composed of Two Antiparallel Bipolar Memristors-
dc.typeArticle-
dc.identifier.wosid000669747100002-
dc.type.rimsART-
dc.citation.volume2-
dc.citation.issue1-
dc.citation.beginningpage1900082-
dc.citation.publicationnameADVANCED INTELLIGENT SYSTEMS-
dc.identifier.doi10.1002/aisy.201900082-
dc.contributor.localauthorKim, Kyung Min-
dc.contributor.nonIdAuthorXu, Nuo-
dc.contributor.nonIdAuthorPark, Tae Gyun-
dc.contributor.nonIdAuthorKim, Hae Jin-
dc.contributor.nonIdAuthorShao, Xinglong-
dc.contributor.nonIdAuthorYoon, Kyung Jean-
dc.contributor.nonIdAuthorPark, Tae Hyung-
dc.contributor.nonIdAuthorFang, Liang-
dc.contributor.nonIdAuthorHwang, Cheol Seong-
dc.description.isOpenAccessY-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorantiparallel memristors-
dc.subject.keywordAuthorlogic cascading-
dc.subject.keywordAuthorstateful logics-
dc.subject.keywordAuthor3D crossbar arrays-
dc.subject.keywordPlusRESISTIVE MEMORY-
dc.subject.keywordPlusCROSSBAR ARRAY-
dc.subject.keywordPlusOPERATIONS-
dc.subject.keywordPlusUNIFORMITY-
dc.subject.keywordPlusDEVICES-
dc.subject.keywordPlusDESIGN-
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