In the semiconductor manufacturing industry, cluster tools are widely used for most wafer fabrication process such as photolithography, etching, deposition, and even inspection. To improve the performance of semiconductors, the wafer circuit width has been shrunk dramatically. Since this makes complexity of scheduling problems high, a sophisticated simulation model is needed to test and verify the various scheduling method. Most of the previous research have been focused on Vacuum Module (VM). However, the scheduling problem of Equipment Front-End Module (EFEM) has recently been emphasized, and bottleneck begins to occur also in EFEM. Therefore, in this study, we propose a new modeling method that includes EFEM which was not considered in the past.