DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Lee-Sup | ko |
dc.contributor.author | Lee, Sehwan | ko |
dc.contributor.author | Sim, Jaehyeong | ko |
dc.contributor.author | Kim, Hyeonuk | ko |
dc.contributor.author | Choi, Yeongjae | ko |
dc.date.accessioned | 2020-11-26T07:50:36Z | - |
dc.date.available | 2020-11-26T07:50:36Z | - |
dc.identifier.uri | http://hdl.handle.net/10203/277649 | - |
dc.description.abstract | A processor-implemented neural network method includes: obtaining, from a memory, data an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation. | - |
dc.title | Neural network method and apparatus | - |
dc.title.alternative | 뉴럴 네트워크 방법과 장치 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Kim, Lee-Sup | - |
dc.contributor.nonIdAuthor | Lee, Sehwan | - |
dc.contributor.nonIdAuthor | Kim, Hyeonuk | - |
dc.contributor.nonIdAuthor | Choi, Yeongjae | - |
dc.contributor.assignee | KAIST, Samsung Electronics Co., Ltd. | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 16110664 | - |
dc.identifier.patentRegistrationNumber | 10699160 | - |
dc.date.application | 2018-08-23 | - |
dc.date.registration | 2020-06-30 | - |
dc.publisher.country | US | - |
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