DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hwang, Ranggi | ko |
dc.contributor.author | Kim, Taehun | ko |
dc.contributor.author | Kwon, Youngeun | ko |
dc.contributor.author | Rhu, Minsoo | ko |
dc.date.accessioned | 2020-09-18T04:16:24Z | - |
dc.date.available | 2020-09-18T04:16:24Z | - |
dc.date.created | 2020-08-12 | - |
dc.date.created | 2020-08-12 | - |
dc.date.created | 2020-08-12 | - |
dc.date.issued | 2020-06-03 | - |
dc.identifier.citation | 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), pp.968 - 981 | - |
dc.identifier.issn | 0884-7495 | - |
dc.identifier.uri | http://hdl.handle.net/10203/276213 | - |
dc.description.abstract | Personalized recommendations are the backbone machine learning (ML) algorithm that powers several important application domains (e.g., ads, e-commerce, etc) serviced from cloud datacenters. Sparse embedding layers are a crucial building block in designing recommendations yet little attention has been paid in properly accelerating this important ML algorithm. This paper first provides a detailed workload characterization on personalized recommendations and identifies two significant performance limiters: memory-intensive embedding layers and compute-intensive multi-layer perceptron (MLP) layers. We then present Centaur, a chiplet-based hybrid sparse-dense accelerator that addresses both the memory throughput challenges of embedding layers and the compute limitations of MLP layers. We implement and demonstrate our proposal on an Intel HARPv2, a package-integrated CPU+FPGA device, which shows a 1.7-17.2x performance speedup and 1.7-19.5x energy-efficiency improvement than conventional approaches. | - |
dc.language | English | - |
dc.publisher | IEEE/ACM | - |
dc.title | Centaur: A Chiplet-based, Hybrid Sparse-Dense Accelerator for Personalized Recommendations | - |
dc.type | Conference | - |
dc.identifier.wosid | 000617734800072 | - |
dc.identifier.scopusid | 2-s2.0-85091997107 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 968 | - |
dc.citation.endingpage | 981 | - |
dc.citation.publicationname | 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA) | - |
dc.identifier.conferencecountry | SP | - |
dc.identifier.conferencelocation | Valencia | - |
dc.identifier.doi | 10.1109/ISCA45697.2020.00083 | - |
dc.contributor.localauthor | Rhu, Minsoo | - |
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