Controller, semiconductor memory system and operating method thereof제어기, 반도체 기억 장치 시스템과 이의 작동 방법
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Moon, Jaekyun | ko |
| dc.contributor.author | Choi, Beongjun | ko |
| dc.contributor.author | Yoon, Sung Whan | ko |
| dc.date.accessioned | 2020-07-03T07:20:21Z | - |
| dc.date.available | 2020-07-03T07:20:21Z | - |
| dc.identifier.uri | http://hdl.handle.net/10203/275205 | - |
| dc.description.abstract | An operation method of a controller includes: generating a predetermined number of sub-messages by dividing an original message; generating a first parity added message by adding a cyclic redundancy check (CRC) parity message of a predetermined length to each of the sub-messages; and generating an encoded message by performing a polar encoding operation to the first parity added message. | - |
| dc.title | Controller, semiconductor memory system and operating method thereof | - |
| dc.title.alternative | 제어기, 반도체 기억 장치 시스템과 이의 작동 방법 | - |
| dc.type | Patent | - |
| dc.type.rims | PAT | - |
| dc.contributor.localauthor | Moon, Jaekyun | - |
| dc.contributor.nonIdAuthor | Choi, Beongjun | - |
| dc.contributor.nonIdAuthor | Yoon, Sung Whan | - |
| dc.contributor.assignee | KAIST, SK Hynix Inc. | - |
| dc.identifier.iprsType | 특허 | - |
| dc.identifier.patentApplicationNumber | 15666705 | - |
| dc.identifier.patentRegistrationNumber | 10439647 | - |
| dc.date.application | 2017-08-02 | - |
| dc.date.registration | 2019-10-08 | - |
| dc.publisher.country | US | - |
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