STRUCTURE AND ELECTRICAL-RESISTIVITY OF LOW-PRESSURE CHEMICAL VAPOR-DEPOSITED SILICON

Abstract

Amorphous and polycrystalline silicon films were formed onto thermally oxidized silicon by low pressure chemical vapor deposition (LPCVD), and implanted with phosphorus or boron, and then annealed in N2ambient. The structure and electrical resistivity of P- or B-implanted LPCVD silicon have been investigated as a function of deposition temperature and annealing condition. The orientation preference of the polysilicon is described with the texture coefficient, and the mean crystallite size is calculated by weighing the texture coefficient. Common to the P- and B-implanted cases, amorphous silicon (deposited at 560 °C) gets crystallites larger than the polycrystalline silicon (deposited at 625 °C) after thermal annealing. The resistivity of the P- and B-implanted polycrystalline silicon varies significantly with process history. Mean crystallite size of the polysilicon is chosen for a normalizing parameter, and it is proved to specify the accumulating effect of LPCVD temperature and annealing condition on the polysilicon resistivity. An anomalous resistivity change of 80 keV-B-implanted polysilicon by thermal annealing is observed and believed to be owing to the boron loss into the buried oxide. The markedly improved conductivity of the polysilicon which was deposited in the amorphous state and crystallized subsequently is proven to be due to enhanced grain growth.