DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yoon, Heein | ko |
dc.contributor.author | Park, Suneui | ko |
dc.contributor.author | Choi, Jaehyouk | ko |
dc.date.accessioned | 2019-12-17T08:20:12Z | - |
dc.date.available | 2019-12-17T08:20:12Z | - |
dc.date.created | 2019-12-13 | - |
dc.date.created | 2019-12-13 | - |
dc.date.created | 2019-12-13 | - |
dc.date.issued | 2019-06 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.6, pp.1564 - 1574 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/269798 | - |
dc.description.abstract | This paper presents a low-jitter, injection-locked frequency generator that can provide multiple output frequencies concurrently. The injection-locked digitally controlled oscillators (DCOs) can be controlled separately so that their output frequencies can be changed independently between 0.9 and 1.2 GHz in 15-MHz steps. Due to the proposed time-interleaved frequency calibrator that operates continuously in the background, all injection-locked DCOs are ensured to maintain excellent jitter performance against process, voltage, and temperature (PVT) variations. As a prototype, the proposed injection-locked, multi-frequency generator (ILMFG) was designed to generate two independently controlled output signals, and it was fabricated in a 65-nm CMOS technology. The 1-MHz phase noise and the rms jitter integrated from 1 kHz to 40 MHz of the 960-MHz output signal were -133.5 dBc/Hz and 375 fs, respectively. The degradation of rms jitter was restricted to less than 10%. The silicon area was 0.05 mm(2), and the total power consumption was 7.7 mW when generating two different output frequencies. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration | - |
dc.type | Article | - |
dc.identifier.wosid | 000469840600006 | - |
dc.identifier.scopusid | 2-s2.0-85066444928 | - |
dc.type.rims | ART | - |
dc.citation.volume | 54 | - |
dc.citation.issue | 6 | - |
dc.citation.beginningpage | 1564 | - |
dc.citation.endingpage | 1574 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.identifier.doi | 10.1109/JSSC.2019.2893513 | - |
dc.contributor.localauthor | Choi, Jaehyouk | - |
dc.contributor.nonIdAuthor | Yoon, Heein | - |
dc.contributor.nonIdAuthor | Park, Suneui | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Clock multiplier | - |
dc.subject.keywordAuthor | digitally controlled oscillator (DCO) | - |
dc.subject.keywordAuthor | fractional resolution | - |
dc.subject.keywordAuthor | frequency synthesizer | - |
dc.subject.keywordAuthor | injection locking | - |
dc.subject.keywordAuthor | jitter | - |
dc.subject.keywordAuthor | multi-frequency generator | - |
dc.subject.keywordAuthor | phase noise | - |
dc.subject.keywordAuthor | replica | - |
dc.subject.keywordAuthor | time-interleaved | - |
dc.subject.keywordPlus | PHASE-NOISE | - |
dc.subject.keywordPlus | LOW-POWER | - |
dc.subject.keywordPlus | FREQUENCY-MULTIPLIER | - |
dc.subject.keywordPlus | LOOP | - |
dc.subject.keywordPlus | PLL | - |
dc.subject.keywordPlus | COMPACT | - |
dc.subject.keywordPlus | LOCKING | - |
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