DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kislal, Orhan | ko |
dc.contributor.author | Kotra, Jagadish | ko |
dc.contributor.author | Tang, Xulong | ko |
dc.contributor.author | Kandemir, Mahmut Taylan | ko |
dc.contributor.author | Jung, Myoungsoo | ko |
dc.date.accessioned | 2019-12-13T12:31:04Z | - |
dc.date.available | 2019-12-13T12:31:04Z | - |
dc.date.created | 2019-11-28 | - |
dc.date.issued | 2017-09-09 | - |
dc.identifier.citation | 26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017, pp.138 - 139 | - |
dc.identifier.uri | http://hdl.handle.net/10203/269609 | - |
dc.description.abstract | Employing an on-chip network in a manycore system (to improve scalability) makes the latencies of data accesses issued by a core non-uniform, which significant impact application performance. This paper presents a compiler strategy which involves exposing architecture information to the compiler to enable optimized computation-to-core mapping. Our scheme takes into account the relative positions of (and distances between) cores, last-level caches (LLCs) and memory controllers (MCs) in a manycore system, and generates a mapping of computations to cores with the goal of minimizing the on-chip network traffic. Our experiments of 12 multi-threaded applications reveal that, on average, our approach reduces the on-chip network latency in a 6x6 manycore system by 49.5% in the case of private LLCs and 52.7% in the case of shared LLCs. These improvements translate to the corresponding execution time improvements of 14.8% and 15.2% for the private LLC and shared LLC based systems. | - |
dc.language | English | - |
dc.publisher | ACM and IEEE Computer Society | - |
dc.title | Location-Aware Computation Mapping for Manycore Processors | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 138 | - |
dc.citation.endingpage | 139 | - |
dc.citation.publicationname | 26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017 | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | Portland, Oregon | - |
dc.identifier.doi | 10.1109/PACT.2017.20 | - |
dc.contributor.localauthor | Jung, Myoungsoo | - |
dc.contributor.nonIdAuthor | Kislal, Orhan | - |
dc.contributor.nonIdAuthor | Kotra, Jagadish | - |
dc.contributor.nonIdAuthor | Tang, Xulong | - |
dc.contributor.nonIdAuthor | Kandemir, Mahmut Taylan | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.