Digitally Adaptive High-Fidelity Analog Array Signal Processing Resilient to Capacitive Multiplying DAC Inter-Stage Gain Error

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This paper studies multi-stage capacitive mixed-signal matrix-vector multiplying digital-to-analog (MDAC) conversion topologies for highly energy-efficient, high-resolution, and high-dimensional MIMO analog processing systems. In order to mitigate nonlinearity due to radix errors and capacitive mismatch encountered in compact low-power MDAC realizations, we introduce stochastic successive approximation, or S(2)A, as an online optimization algorithm for adaptive array analog signal processing amenable to efficient implementation in massively parallel mixed-signal hardware. S(2)A offers a direct alternative to stochastic gradient descent overcoming several of its shortcomings, such as its sensitivity to model error, while improving on the rate and quality of convergence. S(2)A overcomes non-convergence typically encountered with gradient descent for non-convex optimization landscapes induced by a mismatch in capacitive multiplying digital-to-analog converter components when applied to adaptive analog signal processing. Experimental validation of S(2)A in mixed-signal hardware for real-time RF adaptive beamforming demonstrates 65 dB of over-the-air, multipath interferer suppression in fewer than 25 S(2)A iterations.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2019-11
Language
English
Article Type
Article
Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.66, no.11, pp.4095 - 4107

ISSN
1549-8328
DOI
10.1109/TCSI.2019.2926447
URI
http://hdl.handle.net/10203/268888
Appears in Collection
BiS-Journal Papers(저널논문)
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