DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Taeju | ko |
dc.contributor.author | Park, Jee-Ho | ko |
dc.contributor.author | Cha, Ji-Hyoung | ko |
dc.contributor.author | Chou, Namsun | ko |
dc.contributor.author | Jang, Doojin | ko |
dc.contributor.author | Kim, Ji-Hoon | ko |
dc.contributor.author | Cho, Il-Joo | ko |
dc.contributor.author | Kim, Seong-Jin | ko |
dc.contributor.author | Je, Minkyu | ko |
dc.date.accessioned | 2019-11-26T05:20:22Z | - |
dc.date.available | 2019-11-26T05:20:22Z | - |
dc.date.created | 2019-11-26 | - |
dc.date.created | 2019-11-26 | - |
dc.date.issued | 2019-06-13 | - |
dc.identifier.citation | 33rd Symposium on VLSI Circuits, VLSI Circuits 2019, pp.C290 - C291 | - |
dc.identifier.uri | http://hdl.handle.net/10203/268594 | - |
dc.description.abstract | This paper presents a multimodal multichannel neural activity readout IC which can perform not only the electrical recording (ER) but also the fluorescence recording (FR) of neural activity for the cell-type-specific study of heterogeneous neuronal cell populations. The time-based FR circuit senses Ca 2+ concentration using Ca 2+ probes while the ER circuit acquires action potentials (APs) and local field potentials (LFPs). The IC is fabricated in 0.18μm CMOS. The FR circuit achieves a recording range of 81dB (75pA to 860nA) and consumes the power of 0.7μmW/Ch. The ER circuit achieves the input-referred noise (IRN) of 2.7μm V rms over the bandwidth (BW) of 10kHz, while consuming the power of 4.9μmW/Ch. The in-vitro measurement is performed for recording Ca 2+ concentration and electrical neural signals. | - |
dc.language | English | - |
dc.publisher | The IEEE Solid-State Circuits Society,The Japan Society of Applied Physics | - |
dc.title | A Multimodal Multichannel Neural Activity Readout IC with 0.7μW/Channel Ca2+-Probe-Based Fluorescence Recording and Electrical Recording | - |
dc.type | Conference | - |
dc.identifier.wosid | 000531736500098 | - |
dc.identifier.scopusid | 2-s2.0-85073899513 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | C290 | - |
dc.citation.endingpage | C291 | - |
dc.citation.publicationname | 33rd Symposium on VLSI Circuits, VLSI Circuits 2019 | - |
dc.identifier.conferencecountry | JA | - |
dc.identifier.conferencelocation | Rihga Royal Hotel Kyoto | - |
dc.identifier.doi | 10.23919/VLSIC.2019.8778042 | - |
dc.contributor.localauthor | Je, Minkyu | - |
dc.contributor.nonIdAuthor | Park, Jee-Ho | - |
dc.contributor.nonIdAuthor | Cha, Ji-Hyoung | - |
dc.contributor.nonIdAuthor | Chou, Namsun | - |
dc.contributor.nonIdAuthor | Jang, Doojin | - |
dc.contributor.nonIdAuthor | Kim, Ji-Hoon | - |
dc.contributor.nonIdAuthor | Cho, Il-Joo | - |
dc.contributor.nonIdAuthor | Kim, Seong-Jin | - |
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