(A) study on low-noise and low-power readout integrated circuit for infrared image systems

Abstract

In this dissertation, the two readout integrated circuits (ROICs) which can reduce a noise and power dissipation of the infrared image system are proposed. The first circuit is a low-noise ROIC with ‘self-selected capacitor technic’, and the second circuit is a low-power ROIC with ‘multi phases-gray code counter’. The first circuit was proposed for the short wavelength infrared(SWIR) especially. The SWIR sensor can make user-friendly image similar to visible light. However, the gap of the signal level between day and night is very large because the SWIR sensor is strongly affected by the ambient light. For this reason, the ROIC which can satisfy not only low noise at the night, but also wide dynamic range at the day was designed. The proposed circuit with self-selected capacitor technique can operate independently in each pixel, and it has low noise of 43 electrons with 101dB wide dynamic range. The second circuit was designed for a low power ROIC that reduce the power dissipation of the analog-to-digital converter (ADC) to improve the portability of the infrared image system. The conventional column-level single slope ADC was suitable for low power ROIC because its simplicity, however it needs a high frequency clock which constitute the LSB(Least Significant Bit) for the latest performance requirement. The high frequency clock increases the power dissipation, and heavily influenced by a jitter and RC delay which cause a conversion error. Therefore, the high performance single-slope ADC with ‘multi phases-gray code counter’, ‘CTIA ramp generator’, ‘multi-stage comparator’ was proposed to reduce the clock frequency for LSB. The proposed circuit has 14-bit resolution with power dissipation of the 160uW/column.