Parallelized VLSI Architecture for List Sphere Decoder
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Sin Chong | ko |
| dc.date.accessioned | 2019-04-16T05:11:09Z | - |
| dc.date.available | 2019-04-16T05:11:09Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.identifier.citation | ICACT2007 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/260719 | - |
| dc.language | English | - |
| dc.title | Parallelized VLSI Architecture for List Sphere Decoder | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | ICACT2007 | - |
| dc.identifier.conferencecountry | KO | - |
| dc.contributor.localauthor | Park, Sin Chong | - |
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