DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, John Dongjun | ko |
dc.contributor.author | Lee, Minseok | ko |
dc.date.accessioned | 2019-04-15T16:00:15Z | - |
dc.date.available | 2019-04-15T16:00:15Z | - |
dc.date.issued | 2018-05-29 | - |
dc.identifier.uri | http://hdl.handle.net/10203/255565 | - |
dc.description.abstract | A processor and corresponding method are described including cores having a thread set allocated based on a pre-set implementation order, and a controller configured to receive scheduling information determined based on an implementation pattern regarding the allocated thread set from one of the cores and transmit the scheduling information to another of the cores. The one of cores determines the scheduling information according to characteristics of an application when implementation of the thread set is completed. Each of the cores re-determines an implementation order regarding the allocated thread set based on the determined scheduling information. | - |
dc.title | Method and processor for implementing thread and recording medium thereof | - |
dc.title.alternative | 구현되는 스레드와 이의 기록 매체를 위한 방법과 프로세서 | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | Kim, John Dongjun | - |
dc.contributor.nonIdAuthor | Lee, Minseok | - |
dc.contributor.assignee | KAIST, SAMSUNG ELECTRONICS CO LTD | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 15146044 | - |
dc.identifier.patentRegistrationNumber | 9983910 | - |
dc.date.application | 2016-05-04 | - |
dc.date.registration | 2018-05-29 | - |
dc.publisher.country | US | - |
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