Enabling Realistic Logical Device Interface and Driver for NVM Express Enabled Full System Simulations

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dc.contributor.authorGouk, Donghyunko
dc.contributor.authorZhang, Jieko
dc.contributor.authorJung, Myoungsooko
dc.date.accessioned2019-03-19T01:06:51Z-
dc.date.available2019-03-19T01:06:51Z-
dc.date.created2019-02-28-
dc.date.issued2018-08-
dc.identifier.citationINTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING, v.46, no.4, pp.710 - 721-
dc.identifier.issn0885-7458-
dc.identifier.urihttp://hdl.handle.net/10203/251531-
dc.description.abstractData volumes are drastically increasing, immense information created over the past 10 years exceeds the storage capacity across all media types. While the storage systems play a critical role in modern memory hierarchy, their interfaces and simulation models are overly simplified by computer-system architecture research. Specifically, gem5, a popular full system simulator, includes only Integrated Drive Electronics interface, which was originally designed three decades ago, and simulates the underlying storage device with a constant latency value. In this work, we implement an NVMe disk and controller to enable a realistic storage stack of next generation interfaces and integrate them into gem5 and a high-fidelity solid state disk simulation model. We verify the functionalities of NVMe that we implemented, using a standard user-level tool, called NVMe command line interface. Our evaluation results reveal that the performance of a high performance SSD can significantly vary based on different software stacks and storage controllers even under the same condition of device configurations and degrees of parallelism. Specifically, the traditional interface caps the performance of the SSD by 95%, whereas NVMe interface we implement in gem5 can successfully reveal the true performance aggregated by many underlying flash-based media.-
dc.languageEnglish-
dc.publisherSPRINGER/PLENUM PUBLISHERS-
dc.titleEnabling Realistic Logical Device Interface and Driver for NVM Express Enabled Full System Simulations-
dc.typeArticle-
dc.identifier.wosid000441946400006-
dc.identifier.scopusid2-s2.0-85030858131-
dc.type.rimsART-
dc.citation.volume46-
dc.citation.issue4-
dc.citation.beginningpage710-
dc.citation.endingpage721-
dc.citation.publicationnameINTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING-
dc.identifier.doi10.1007/s10766-017-0530-1-
dc.contributor.localauthorJung, Myoungsoo-
dc.contributor.nonIdAuthorGouk, Donghyun-
dc.contributor.nonIdAuthorZhang, Jie-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorNon-volatile memory express-
dc.subject.keywordAuthorInterface-
dc.subject.keywordAuthorSolid state disks-
dc.subject.keywordAuthorParallel I/O subsystem-
dc.subject.keywordPlusEXPLOITING INTERNAL PARALLELISM-
dc.subject.keywordPlusMEMORY-
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