DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Subin | ko |
dc.contributor.author | Kim, Youngwoo | ko |
dc.contributor.author | Cho, Kyungjun | ko |
dc.contributor.author | Song, Jinwook | ko |
dc.contributor.author | Kim, Joungho | ko |
dc.date.accessioned | 2019-02-21T01:24:54Z | - |
dc.date.available | 2019-02-21T01:24:54Z | - |
dc.date.created | 2019-02-18 | - |
dc.date.created | 2019-02-18 | - |
dc.date.created | 2019-02-18 | - |
dc.date.issued | 2019-02 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.9, no.2, pp.317 - 328 | - |
dc.identifier.issn | 2156-3950 | - |
dc.identifier.uri | http://hdl.handle.net/10203/250465 | - |
dc.description.abstract | In this paper, we first propose and demonstrate a novel on-interposer active power distribution network (PDN) scheme to efficiently suppress simultaneous switching noise (SSN) in a 2.5-D/3-D integrated circuit (IC). The on-interposer active PDN can change the PDN impedance by controlling on-interposer decoupling capacitors. The SSN in a 2.5-D/3-D IC is suppressed by optimal control of the on-interposer active PDN scheme. The active interposer is a silicon interposer including active circuits in its silicon substrate to enhance the electrical performance of the 2.5-D/3-D IC. A test interposer of the proposed on-interposer active PDN is fabricated with a 0.18-mu m CMOS process and assembled on a printed circuit board for measurement and analysis. The active circuits of the proposed scheme and hierarchical PDN are modeled with a distributed RLGC-lumped model for fast simulation. The modeling of the proposed scheme is experimentally verified in the frequency and time domains. We successfully demonstrate that an optimum on-interposer decoupling capacitance for the minimized SSN peak-to-peak voltage was obtained by using the proposed scheme. The proposed scheme efficiently suppressed the SSN in 2.5-D/3-D IC by preventing the SSN generation at antiresonance of the hierarchical PDN. In addition, the proposed scheme is compared with a conventional passive PDN scheme, and the maximum ratio of SSN suppression against the conventional scheme was 17.2%. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Design and Measurement of a Novel On-Interposer Active Power Distribution Network for Efficient Simultaneous Switching Noise Suppression in 2.5-D/3-D IC | - |
dc.type | Article | - |
dc.identifier.wosid | 000457629400014 | - |
dc.identifier.scopusid | 2-s2.0-85048857151 | - |
dc.type.rims | ART | - |
dc.citation.volume | 9 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 317 | - |
dc.citation.endingpage | 328 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | - |
dc.identifier.doi | 10.1109/TCPMT.2018.2841045 | - |
dc.contributor.localauthor | Kim, Joungho | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Active interposer | - |
dc.subject.keywordAuthor | active power distribution network (PDN) | - |
dc.subject.keywordAuthor | antiresonance | - |
dc.subject.keywordAuthor | controllable PDN impedance | - |
dc.subject.keywordAuthor | on-interposer PDN | - |
dc.subject.keywordAuthor | simultaneous switching noise (SSN) | - |
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