DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Heung-joon | ko |
dc.contributor.author | Lee, Kwyro | ko |
dc.contributor.author | Kim, Sunki | ko |
dc.contributor.author | Suh, Chung H | ko |
dc.date.accessioned | 2011-07-20T06:09:30Z | - |
dc.date.available | 2011-07-20T06:09:30Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1995-06 | - |
dc.identifier.citation | KITE JOURNAL OF ELECTRONICS ENGINEERING, v.6, no.2, pp.1 - 4 | - |
dc.identifier.issn | 1016-3417 | - |
dc.identifier.uri | http://hdl.handle.net/10203/24660 | - |
dc.description.abstract | Buried-channel enhancement n-MOSFET using p-type doped polysilicon gate for high performance MOS integrated circuits is presented. Copmared to the conventional enhancement n-MOSFET, this device shows much higher breakdown voltage, smaller hot electron effect, and lower 1/f noise characteristics, with their almost identical static I-V characteristics in the linear and saturation regions. | - |
dc.language | Korean | - |
dc.language.iso | en_US | en |
dc.publisher | 대한전자공학회 | - |
dc.title | High Breakdown and 1/f Noise Enhancement n-MOSFET Suitable for Analog MOS Intergrated Circuits | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.citation.volume | 6 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 1 | - |
dc.citation.endingpage | 4 | - |
dc.citation.publicationname | KITE JOURNAL OF ELECTRONICS ENGINEERING | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Lee, Kwyro | - |
dc.contributor.nonIdAuthor | Park, Heung-joon | - |
dc.contributor.nonIdAuthor | Kim, Sunki | - |
dc.contributor.nonIdAuthor | Suh, Chung H | - |
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