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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

A Design of the New FPGA with Data Path Logic and Run Time Block Reconfiguration Method

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dc.contributor.authorKwak, Jae-Youngko
dc.contributor.authorYoon, Sang-Sicko
dc.contributor.authorKwon, Hung-Junko
dc.contributor.authorLee, Kwyroko
dc.date.accessioned2011-07-13T02:35:50Z-
dc.date.available2011-07-13T02:35:50Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1999-05-
dc.identifier.citationIEEE ISCAS, pp.Ⅰ.467 - Ⅰ.469-
dc.identifier.urihttp://hdl.handle.net/10203/24606-
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-
dc.titleA Design of the New FPGA with Data Path Logic and Run Time Block Reconfiguration Method-
dc.typeConference-
dc.identifier.wosid000081715100115-
dc.type.rimsCONF-
dc.citation.beginningpageⅠ.467-
dc.citation.endingpageⅠ.469-
dc.citation.publicationnameIEEE ISCAS-
dc.identifier.conferencecountryUS-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorLee, Kwyro-
dc.contributor.nonIdAuthorKwak, Jae-Young-
dc.contributor.nonIdAuthorYoon, Sang-Sic-
dc.contributor.nonIdAuthorKwon, Hung-Jun-
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EE-Conference Papers(학술회의논문)
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