This paper presents an ultra-low power, high-sensitivity, and interference-resistant receiver suitable for loT applications. By the combination of sliding-IF based low-power down-conversion and relative-power-detection based FSK demodulation, the proposed receiver achieves multi-channel operation and minimizes power consumption. Cascaded N-path filter and 4th-order hybrid-PPF are adopted to improve the sensitivity and carrier-to-interference ratio. Implemented in a 65nm CMOS, the receiver achieves -102dBm sensitivity at 0.1% BER while consuming 466 mu W from a 0.6V supply.