DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Yoo, Hoi-Jun | - |
dc.contributor.advisor | 유회준 | - |
dc.contributor.author | Lee, Jinsu | - |
dc.date.accessioned | 2018-06-20T06:22:14Z | - |
dc.date.available | 2018-06-20T06:22:14Z | - |
dc.date.issued | 2017 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=675420&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/243312 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2017.2,[iii, 22 p. :] | - |
dc.description.abstract | An energy-efficient analog SRAM (A-SRAM) is proposed to eliminate redundant analog-to-digital (A/D) and digital-to-analog (D/A) conversion in mixed-signal systems, such as neuromorphic chips and neural networks. D/A conversion is integrated into the SRAM readout by charge sharing of the proposed split bit-line (BL). Also, A/D conversion is integrated into the SRAM write operation with the successive approximation method in the proposed inout (IO) block. Also, a configurable SRAM bit-cell array is proposed to allocate the converted digital data without unfilled bit-cells. The multi-row access decoder selects multiple bit-cells in a single column and configures the bit-cell array by controlling the BL switches to split BLs. The proposed A-SRAM is implemented using 65 nm CMOS technology. It achieves 17.5 fJ/bit energy-efficiency and 21 Gbit/s throughput for the analog readout, which are 64% and 1.3× better than those of the conventional SRAM followed by a DAC. Also, the area is reduced by 91% compared to the conventional SRAM with ADC and DAC. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Analog memory | - |
dc.subject | SRAM | - |
dc.subject | mixed-signal processing | - |
dc.subject | ADC | - |
dc.subject | DAC | - |
dc.subject | 아날로그 메모리 | - |
dc.subject | 정적 메모리 | - |
dc.subject | 혼성 신호 프로세싱 | - |
dc.title | (An) energy-efficient analog SRAM for mixed-signal processing | - |
dc.title.alternative | 혼성 시그널 프로세싱을 위한 에너지 효율적인 아날로그 정적 메모리 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전기및전자공학부, | - |
dc.contributor.alternativeauthor | 이진수 | - |
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