Fast transient charging behavior of HfInZnO thin-film transistor

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dc.contributor.authorKim, Taehoko
dc.contributor.authorHur, Ji-Hyunko
dc.contributor.authorJeon, Sanghunko
dc.date.accessioned2018-03-21T02:53:24Z-
dc.date.available2018-03-21T02:53:24Z-
dc.date.created2018-03-07-
dc.date.created2018-03-07-
dc.date.issued2015-08-
dc.identifier.citationAPPLIED PHYSICS LETTERS, v.107, no.9-
dc.identifier.issn0003-6951-
dc.identifier.urihttp://hdl.handle.net/10203/240776-
dc.description.abstractThreshold voltage instabilities and mobility degradation of amorphous oxide-based thin-film transistors (TFTs) are associated with charging phenomena in gate dielectrics, interfaces. The wide range of charge trapping when using DC techniques may mislead to the evaluation of intrinsic device characteristics. In this investigation, we studied the charging behavior in HfInZnO TFTs with the Hf metal content by fast and transient current measurement methods. Since the charge-trapping effect is negligible during fast voltage ramping, the drain current measured by the fast I-V method was higher than that obtained from DC measurement, indicating that conventional DC measurement underestimates the mobility values even for oxide-TFTs. The mobility values of the HfInZnO TFTs with high and low Hf contents were measured by the fast I-V method to be 2.7 and 13.5 cm(2)/V s, respectively, which were increased by 16-68% after the fast I-V measurement. In addition, trapping time constants of 24 and 17 mu s for both devices were estimated by the transient I-V method. According to the fitting model, the charge trapping was governed by multiple processes with two different time constants. (C) 2015 AIP Publishing LLC.-
dc.languageEnglish-
dc.publisherAMER INST PHYSICS-
dc.subjectELECTRON-TRAPPING CHARACTERIZATION-
dc.subjectAMORPHOUS OXIDE SEMICONDUCTORS-
dc.subjectV-G METHODOLOGY-
dc.subjectGATE DIELECTRICS-
dc.subjectPERFORMANCE-
dc.subjectINTERFACE-
dc.subjectVOLTAGE-
dc.subjectSTRESS-
dc.titleFast transient charging behavior of HfInZnO thin-film transistor-
dc.typeArticle-
dc.identifier.wosid000360926200055-
dc.identifier.scopusid2-s2.0-84940671471-
dc.type.rimsART-
dc.citation.volume107-
dc.citation.issue9-
dc.citation.publicationnameAPPLIED PHYSICS LETTERS-
dc.identifier.doi10.1063/1.4929864-
dc.contributor.localauthorJeon, Sanghun-
dc.contributor.nonIdAuthorKim, Taeho-
dc.contributor.nonIdAuthorHur, Ji-Hyun-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordPlusELECTRON-TRAPPING CHARACTERIZATION-
dc.subject.keywordPlusAMORPHOUS OXIDE SEMICONDUCTORS-
dc.subject.keywordPlusV-G METHODOLOGY-
dc.subject.keywordPlusGATE DIELECTRICS-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusINTERFACE-
dc.subject.keywordPlusVOLTAGE-
dc.subject.keywordPlusSTRESS-
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