Pulse I-V characterization of a nanocrystalline oxide device with sub-gap density of states

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dc.contributor.authorKim, Taehoko
dc.contributor.authorHur, Ji-Hyunko
dc.contributor.authorJeon, Sanghunko
dc.date.accessioned2018-03-21T02:53:03Z-
dc.date.available2018-03-21T02:53:03Z-
dc.date.created2018-03-07-
dc.date.created2018-03-07-
dc.date.issued2016-05-
dc.identifier.citationNANOTECHNOLOGY, v.27, no.21-
dc.identifier.issn0957-4484-
dc.identifier.urihttp://hdl.handle.net/10203/240762-
dc.description.abstractUnderstanding the charge trapping nature of nano-crystalline oxide semiconductor thin film transistors (TFTs) is one of the most important requirements for their successful application. In our investigation, we employed a fast-pulsed I-V technique for understanding the charge trapping phenomenon and for characterizing the intrinsic device performance of an amorphous/nano-crystalline indium-hafnium-zinc-oxide semiconductor TFT with varying density of states in the bulk. Because of the negligible transient charging effect with a very short pulse, the source-to-drain current obtained with the fast-pulsed I-V measurement was higher than that measured by the direct-current characterization method. This is because the fast-pulsed I-V technique provides a charge-trap free environment, suggesting that it is a representative device characterization methodology of TFTs. In addition, a pulsed source-to-drain current versus time plot was used to quantify the dynamic trapping behavior. We found that the charge trapping phenomenon in amorphous/nano-crystalline indium-hafnium-zinc-oxide TFTs is attributable to the charging/discharging of sub-gap density of states in the bulk and is dictated by multiple trap-to-trap processes.-
dc.languageEnglish-
dc.publisherIOP PUBLISHING LTD-
dc.subjectTHIN-FILM TRANSISTORS-
dc.subjectELECTRON-TRAPPING CHARACTERIZATION-
dc.subjectGATE DIELECTRICS-
dc.subjectG METHODOLOGY-
dc.subjectPERFORMANCE-
dc.subjectINSTABILITY-
dc.subjectINTERFACE-
dc.subjectSTRESS-
dc.titlePulse I-V characterization of a nanocrystalline oxide device with sub-gap density of states-
dc.typeArticle-
dc.identifier.wosid000374507600005-
dc.identifier.scopusid2-s2.0-84964720176-
dc.type.rimsART-
dc.citation.volume27-
dc.citation.issue21-
dc.citation.publicationnameNANOTECHNOLOGY-
dc.identifier.doi10.1088/0957-4484/27/21/215203-
dc.contributor.localauthorJeon, Sanghun-
dc.contributor.nonIdAuthorKim, Taeho-
dc.contributor.nonIdAuthorHur, Ji-Hyun-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthornanocrystal-
dc.subject.keywordAuthoroxide semiconductor-
dc.subject.keywordAuthorcarrier transport-
dc.subject.keywordAuthorsub-gap states-
dc.subject.keywordPlusTHIN-FILM TRANSISTORS-
dc.subject.keywordPlusELECTRON-TRAPPING CHARACTERIZATION-
dc.subject.keywordPlusGATE DIELECTRICS-
dc.subject.keywordPlusG METHODOLOGY-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusINSTABILITY-
dc.subject.keywordPlusINTERFACE-
dc.subject.keywordPlusSTRESS-
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