DC Field | Value | Language |
---|---|---|
dc.contributor.author | 조규형 | ko |
dc.date.accessioned | 2017-12-20T12:48:34Z | - |
dc.date.available | 2017-12-20T12:48:34Z | - |
dc.date.issued | 2008-03-04 | - |
dc.identifier.uri | http://hdl.handle.net/10203/236508 | - |
dc.description.abstract | Disclosed herein are a time division sampling digital to analog converter for a flat panel display, a method of implementing the digital to analog converter, and a data driver circuit using the digital to analog converter. The time division sampling digital to analog converter includes a timing signal generation means for generating timing signals, a data selection means for receiving n-bit digital data, dividing the n-bit digital data into k groups, and outputting the divided digital input data; k reference signal generation means for each outputting 2n/k analog reference signals; a reference signal selection means for receiving the outputs of the reference signal generation means and outputting only 2n/k analog reference signals selected according to a timing signal from the timing signal generation means; a multiplexer for outputting one of reference signals from the reference signal selection means using the n/k-bit digital data from the data selection means as a control input; and a sampling mode analog addition means for sampling and storing the output of the multiplexer according to a timing signal from the timing signal generation means. | - |
dc.title | Time division sampling digital to analog converter for driving flat panel display, method of implementing the same, and data driver circuit using the same | - |
dc.type | Patent | - |
dc.type.rims | PAT | - |
dc.contributor.localauthor | 조규형 | - |
dc.contributor.assignee | KAIST | - |
dc.identifier.iprsType | 특허 | - |
dc.identifier.patentApplicationNumber | 11367865 | - |
dc.identifier.patentRegistrationNumber | 7339511 | - |
dc.date.application | 2006-03-03 | - |
dc.date.registration | 2008-03-04 | - |
dc.publisher.country | US | - |
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